After HBM, is CXL the next battleground for storage? Samsung achieves a tenfold performance breakthrough.

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Against the backdrop of continuously expanding AI computing power demands and intensifying supply-demand conflicts in storage chips, CXL (Compute Express Link) is moving from a niche technology to an industry focal point. Samsung Electronics, SK Hynix, and Micron Technology have successively increased their investments, while Google and NVIDIA have entered to validate the technology, making this track the new high ground for competition in storage after HBM.

Recently, Samsung published a paper at an IEEE academic conference, revealing the latest progress of its CXL memory system "Pangea v2." According to Korea Economic Daily, the system's data transfer performance is 10.2 times higher than traditional interconnect methods such as RDMA, while reducing long-standing bottleneck issues in traditional memory architectures by up to 96%, making it an important technological breakthrough in the CXL field.

On the demand side, technology giants are providing real-world endorsement for this technology. According to The Information, Google has begun deploying CXL in its data centers and is installing controllers to manage data traffic between CPUs and large external memory pools. NVIDIA plans to support the CXL 3.1 standard in its Vera CPU, which is set to launch later this year, marking the industry’s largest-scale CXL field test to date.

Despite the industry’s growing enthusiasm, large-scale commercial adoption of CXL still faces a key constraint — the technology requires all CPUs, GPUs, memory, and network devices in a data center to support the same standard. The complexity of cross-industry ecosystem coordination is the toughest barrier to widespread adoption.

Samsung "Pangea v2": Significant Performance Leap, Memory Pool Expansion Breaks Through 5.5TB

The "Pangea v2" system showcased by Samsung represents its latest technological achievement in the CXL field.

According to Korea Economic Daily, the system is based on the CXL 2.0 standard jointly launched by Intel, NVIDIA, and others in 2020. It integrates 22 CXL DRAM modules (CMM-D) into a single shared memory pool, supporting up to 5.5TB of memory accessible by multiple servers. During development, Samsung collaborated with global semiconductor design company Marvell and AI infrastructure firm Liquid AI.

On the performance side, Pangea v2’s data transfer capability is 10.2 times greater than traditional RDMA solutions, with bottleneck improvements of up to 96%.

As the CXL standard has already evolved to version 3.2, Samsung says it plans to release "Pangea v3" based on the latest specifications in 2026.

Three Major Storage Vendors Fully Enter the Market, Competitive Landscape Accelerates

SK Hynix is also rapidly advancing CXL R&D.

According to Korea Economic Daily, the company launched its first CXL DRAM in 2022 and followed up in 2023 with products compatible with CXL 2.0. Its CMM-DDR5 96GB memory solution completed customer certification in 2025. Park Joon-deok, SK Hynix DRAM marketing director, stated the company will maintain technological leadership with its second-generation product supporting CXL 3.0.

Micron Technology launched its own CXL memory modules in 2024, marking its official entry. With all three major storage manufacturers completing their layouts, the competitive structure of the CXL track is taking shape.

Google and NVIDIA Validate Demand, AI Memory Efficiency as Core Driver

The core logic behind CXL’s market attention is its effective solution to the chronic low memory utilization in AI servers.

In the current architecture, each GPU and CPU relies on exclusive memory, with utilization rates only 20% to 30% under normal operations. CXL allows multiple GPUs and CPUs to dynamically share a unified memory pool, dramatically improving resource efficiency.

According to The Information, citing two Google employees, Google has taken the lead in deploying CXL in production, evaluating how to more deeply integrate external memory pools into its own systems to accelerate processor access to external memory.

NVIDIA’s Vera CPU will support the CXL 3.1 standard, and its large-scale market entry will be an important reference point for whether CXL can evolve from experimental projects at a few companies to a reliable industry solution.

Jin Kim, CEO of South Korean CXL startup Xcena, said: "AI infrastructure needs massive memory, and memory prices are continuously rising. This forces our target customers to improve memory utilization efficiency. Currently, there is no other solution that can replace CXL to improve memory efficiency."

Ecosystem Collaboration Barriers Are High, Adoption Timeline Remains Uncertain

CXL faces fundamental ecosystem challenges in large-scale implementation.

Bernstein Research semiconductor analyst Mark Li pointed out: "To make CXL work, you need CPU, GPU, memory, and software all compatible. Companies able to simultaneously control these products and drive collaborative change are very few. NVIDIA is one, Google is another."

Historically, AMD launched CXL-supported server chips in 2022 and Intel in 2023, but commercialization of both was very limited. Even though Google is deploying CXL in production environments, industry engineers generally believe current CXL technology does not fully meet all the needs of major cloud service providers.

Each time the CXL Consortium determines a new specification, chip designers spend one to two years redesigning processors, component manufacturers then build compatible controllers and switches, storage vendors transform memory modules, and server manufacturers conduct months of compatibility testing. This lengthy industry chain collaboration is the real barrier CXL must overcome to become widely adopted. The market performance of NVIDIA’s Vera CPU this year will provide the most valuable reference answer yet.

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