"Father of HBM": The commercialization of high bandwidth flash (HBF) is progressing faster than expected, and it may be integrated into GPUs within 2-3 years, with a market size expected to surpass HBM.

"Father of HBM": The commercialization of high bandwidth flash (HBF) is progressing faster than expected, and it may be integrated into GPUs within 2-3 years, with a market size expected to surpass HBM.

The commercialization process of High Bandwidth Flash (HBF) is accelerating, and this new storage technology, regarded as the "NAND version of HBM," is expected to be implemented earlier than anticipated. Professor Kim Joungho of KAIST, known as the "Father of HBM," recently revealed that Samsung Electronics and SanDisk plan to integrate HBF into products from Nvidia, AMD, and Google by the end of 2027 to early 2028.

Kim Joungho pointed out that, thanks to the process and design experience accumulated from HBM, the commercialization of HBF will proceed much faster than the development cycle of HBM. He predicts that HBF will see widespread adoption during the rollout of HBM6, and estimates that by around 2038, its market size may surpass HBM.

The continuous growth of AI workloads is a key driver for the development of HBF. Compared to traditional DRAM-based HBM, HBF vertically stacks NAND flash memory to deliver about ten times the capacity while maintaining high bandwidth, making it particularly suitable for large-capacity scenarios like AI inference. Currently, Samsung Electronics and SK Hynix have signed a memorandum of understanding (MoU) with SanDisk to jointly promote the standardization of HBF, with the goal of bringing products to market in 2027.

Technical Advantages of HBF: A Balance of Capacity and Bandwidth

HBF adopts a vertically stacked architecture similar to HBM, but stacks NAND flash chips instead of DRAM chips—a key difference that results in significant capacity improvements. According to industry analysis, HBF bandwidth can exceed 1638 GB/s, far higher than the roughly 7 GB/s bandwidth of NVMe PCIe 4.0 SSDs; its capacity can reach up to 512GB, significantly surpassing the 64GB upper limit of HBM4.

Kim Joungho further explained HBF's position in AI workflows: Currently, when GPUs perform AI inference, they read variable data from HBM; in the future, this task may be undertaken by HBF. Although HBM is faster, HBF can provide about ten times the capacity of HBM, making it more suitable for large-scale data processing scenarios.

On technology limitations, Kim Joungho noted that HBF supports unlimited reads but has limited write cycles (about 100,000 times), which requires companies like OpenAI and Google to optimize their software architectures for read-heavy operations. He vividly described it as:

"If HBM is like a bookshelf at home, HBF is akin to studying at a library—slightly slower but with a much larger collection of knowledge at your disposal."

Industry Deployment: Storage Giants Accelerate Efforts

SK Hynix is expected to launch a trial version of HBF and hold technical demonstrations later this month. Previously, Samsung Electronics and SK Hynix had signed an MoU with SanDisk to establish a joint alliance aimed at advancing the standardization process of HBF. Both companies are currently actively developing related products.

According to TrendForce, SanDisk was the first to release a HBF prototype in February 2025 and formed a technical advisory committee. In August of the same year, the company signed an MoU with SK Hynix to promote specification standardization, planning to deliver engineering samples in the second half of 2026 and pursue commercial use by early 2027. Samsung Electronics has also begun conceptual design for its own HBF products.

HBF's technical implementation mainly relies on Through-Silicon-Via (TSV) technology to achieve multilayer vertical stacking of NAND chips, using advanced 3D stacking architecture and chip-to-wafer bonding processes. Each package can stack up to 16 NAND chips, supports parallel access through multiple arrays, and delivers bandwidth of 1.6TB/s to 3.2TB/s, comparable to the performance of HBM3. Single stack capacity can reach 512GB, and an eight-stack configuration offers total capacity of 4TB, equivalent to 8 to 16 times the capacity of HBM.

Future Architecture: From HBM6 to the "Memory Factory"

Kim Joungho predicts that HBF will be widely applied during the rollout of HBM6. He pointed out that once we enter the HBM6 era, systems will no longer depend on single stacks but will be interconnected to form "storage clusters," analogous to the logic of modern residential complexes. DRAM-based HBM faces obvious capacity limitations, while NAND-stacked HBF will fill this gap effectively.

Regarding system architecture evolution, Kim Joungho proposed a more streamlined data pathway. Currently, GPUs acquire data by going through storage networks, data processors, and GPU pipelines—a complex transmission route; in the future, data may be processed directly near HBM, right after storage. This architecture, called the "memory factory," is expected to emerge in the HBM7 era, greatly improving data processing efficiency.

HBF will be deployed alongside HBM, located close to GPUs and other AI accelerators. Kim Joungho said: "I believe that within two to three years, the term HBF will become widely known." He further pointed out that HBF will soon enter a period of rapid development and gradually take on the role of core back-end data storage.

Looking to the long-term market, Kim Joungho predicts that by around 2038, HBF's market size may surpass HBM. This prediction is based on the ongoing demand for high-capacity storage in AI inference scenarios, as well as the inherent advantage of NAND flash in storage density over DRAM. However, due to the physical characteristics of NAND, HBF has higher latency than DRAM, making it more suitable for read-intensive AI inference tasks rather than latency-critical applications.

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