HBM packaging technology undergoes changes: Samsung and SK Hynix both delay the introduction of HBM hybrid bonding.
Samsung Electronics and SK Hynix are re-examining the timeline for the adoption of hybrid bonding technology in the high-bandwidth memory (HBM) sector. As HBM thickness standards are gradually relaxed and alternative cooling solutions emerge, the commercialization node of this next-generation packaging technology—which was originally highly anticipated—has been repeatedly postponed.
According to South Korean tech media ZDNet Korea on Monday, industry observers noted that the timing for the full application of hybrid bonding technology in next-generation HBM may be later than previously expected. The two companies initially planned to introduce the technology as early as HBM4 (sixth-generation HBM), but ultimately continued to use the traditional thermal compression bonding (TC bonding) method.
Currently, the industry predicts that the introduction of hybrid bonding may be delayed until 16-layer HBM4E (seventh-generation HBM), and some insiders believe the actual timeframe may be pushed even further back.
This change directly impacts the HBM supply chain and related packaging equipment manufacturers. The delay of hybrid bonding technology means an extension of the life cycle for existing TC bonding processes, and the pace of capital expenditure for hybrid bonding equipment and materials will also be adjusted accordingly.
Relaxed thickness standards weaken the core advantages of hybrid bonding
The main advantage of hybrid bonding technology lies in its elimination of bump structures, allowing direct connection of copper wires between DRAM layers, which makes it easier to compress overall HBM thickness and improves thermal performance and power efficiency. However, the market urgency for these advantages is decreasing.
HBM industry thickness standards are gradually loosening. The standard thickness for HBM3E (fifth generation) was 720 microns; in HBM4, it was raised to 775 microns, mainly because the number of stacking layers increased from 8/12 to 12/16. According to sources, international semiconductor standards organization JEDEC is currently discussing raising the thickness limit for products with 20-layer stacks, such as HBM5, from 900 microns to about 1000 microns. Once the thickness constraint is relaxed, the inter-layer spacing of DRAM doesn't need to be compressed to the extreme, and the technical pressure on TC bonding is eased accordingly.
Meanwhile, demand timelines for high-stack HBM from key customers like Nvidia have also moved back. A memory industry insider A said, "Currently, discussions between customers and manufacturers about 16-layer HBM are not active. For now, even in HBM4E, 12-layer products are likely to remain dominant."
Alternative cooling solutions emerge, with both companies taking different routes
Improved cooling performance is another major selling point for hybrid bonding—the removal of bottom-filling material with low thermal conductivity helps enhance HBM thermal characteristics. However, Samsung Electronics and SK Hynix have respectively developed alternative cooling technologies that don’t rely on hybrid bonding.
The core of both companies’ solutions is the integration of independent cooling components beside the HBM core chips. Samsung Electronics calls this the Heat Path Block (HPB), while SK Hynix refers to it as iHBM (ICE HBM). Both companies are currently testing the application of these technologies in HBM5.
Packaging industry sources said, "Integrating cooling components beside the HBM core chip is not technically difficult, and commercialization should pose no obstacles. From the perspective of memory manufacturers, it is a stable choice."
I/O density bottleneck may become the ultimate driver for hybrid bonding
Despite the short-term postponement of the introduction timeline, Samsung Electronics and SK Hynix are expected to continue their hybrid bonding R&D efforts. The driving force comes from the explosive growth demand for I/O density in HBM’s long-term evolutionary path.
HBM4 has doubled the number of I/Os from HBM3E’s 1024 to 2048, greatly narrowing the internal spacing in HBM. TC bonding experiences lateral diffusion during bump melting, which is believed by the industry to be unable to support even higher I/O densities. Packaging industry insider C pointed out, "In the medium to long term, the industry is discussing doubling the I/O again from HBM5E onwards, reaching 4096. At that point, I/O spacing will be extremely tight, and hybrid bonding will become a necessary option."
This means that hybrid bonding technology is not being abandoned, but delayed—its real commercial window may reopen as HBM advances and hits a critical breakthrough in I/O density.
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