NVIDIA's four-chip Rubin Ultra "canceled just three months after release" sparks heated discussion; SemiAnalysis says "NVIDIA's market share is being eroded."

The original design of NVIDIA's next-generation flagship AI chip Rubin Ultra was reportedly forced to be significantly downsized due to packaging and manufacturing challenges.

On June 30, chip industry research institute SemiAnalysis posted on the X platform, claiming that the original 4-chip Rubin Ultra was canceled about three months after its GTC 2026 release, and the new "Rubin Ultra" has been reduced to half its original size, with actual performance also halved.

SemiAnalysis places this in a broader context: NVIDIA's market share is being eroded by Amazon's Trainium, Google's TPU, and AMD chips. The agency bluntly states, "Problems at the manufacturing execution level will only result in more lost market share."

The post quickly sparked controversy—supporters see it as a signal of declining NVIDIA execution, while skeptics argue this news was public three months ago and consider SemiAnalysis biased.

How radical was the original design?

To understand this "downsizing", first look at the ambition of the original design.

According to TechPowerUp's report on March 31, the standard Rubin GPU adopted a packaging plan of 2 compute chips + 8 HBM4 memory modules, whereas the original Rubin Ultra planned to double this—4 compute chips + 16 HBM4E memory modules, all integrated into a single package, and expected to be released in 2027.

This is equivalent to "splicing" two full Rubin chips into one package, which makes for extremely high packaging technology demands.

TSMC used the CoWoS-L packaging process accordingly. But according to Global Semi Research, in the 4-chip (2+2 arrangement) configuration, the packaging substrate suffered from warping—the substrate bent in multiple directions, causing the compute chips to fail to make full contact with the substrate. Poor contact means signal transmission failure, meaning the chip cannot function properly.

TSMC's alternative plan is not ready

Facing the warping challenge of CoWoS-L, TSMC is exploring a new solution called CoPoS (Chip-on-Panel-on-Substrate packaging).

The core idea of CoPoS is to replace the approximately 300mm silicon interposer with a large square/rectangular panel. Early specifications are about 310×310mm, later versions may expand to 515×510mm or even 750×620mm. Larger panels mean more chips and HBM memory can be accommodated, while reducing edge waste.

But timing is an issue. According to TechPowerUp, TSMC originally planned to build a CoPoS trial line as soon as 2026, with mass production targeted for late 2028 to early 2029. This is out of sync with Rubin Ultra’s original 2027 release schedule. Whether CoPoS can meet the 2027 timeline is still uncertain.

SemiAnalysis: The CUDA moat is being eroded

SemiAnalysis further pointed out in its post that the rise of competitors is faster than expected.

"Claude Code, the most successful AI agent, runs a considerable part of its inference workload on Trainium, while Claude's training is done on TPU," SemiAnalysis wrote, "Just a year ago, the rapid growth of TPU and Trainium, and the slow erosion of the CUDA moat, was unimaginable."

This directly addresses NVIDIA's core competitive barrier. The CUDA ecosystem has long been considered NVIDIA’s hardest-to-replicate advantage, but SemiAnalysis believes this advantage is loosening.

SemiAnalysis also points out that this change will have systemic impacts on the HBM memory market and NVIDIA’s future rack products, and refers to its latest accelerator model report for more details.

Dissent: Old news or new information?

This post on X sparked clearly polarized reactions.

Dissenters believe it is just reheated old news. Several users said, "This is old news from three months ago." "Jukan shared this information back in March, the cancellation of the 4-chip version is common knowledge."

Some users directly criticized: "SemiAnalysis published another anti-NVIDIA article, this time with misleading coverage about the cancellation of the 4-chip version (the chip count actually hasn't changed). What's more interesting is—SA's credibility was built on supplier neutrality, not acting as a spokesperson for AMD and ASIC."

Other users said, "SemiAnalysis has clearly shorted NVIDIA, likely imitating Leopold’s hedging position."

Supporters think this matter is worth attention. "NVIDIA is collapsing in its own arrogance."

NVIDIA has not commented on these reports. Users noted, "NVIDIA, as always, remains silent towards these relentless FUD rumors."

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