The "Great Closed Loop" of Domestic Computing Power! DeepSeek's "Unremarkable Sentence" May Change the Entire GPU Programming Ecosystem
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While the market's attention is focused on the API price cut brought by DeepSeek, a technical detail hidden in the announcement—"the programming language TileLang"—is opening a new door.
On September 29, DeepSeek officially released the V3.2-Exp model (experimental version), significantly improving long text processing efficiency, and announced that API call costs were reduced by more than 50%. In this announcement, there was the following statement:
We use the high-level language TileLang for rapid prototyping to support deeper exploration.
This sentence may seem like a technical detail, but it could become a key fulcrum for the construction of the domestic computing ecosystem, and it has quickly triggered a chain reaction within the industry chain.
A recent report by Minsheng Securities pointed out that, on the same day, domestic chip makers such as Huawei Ascend and Cambricon announced they had achieved adaptation to DeepSeek's new model. Especially noteworthy is that Huawei Ascend has already started the development of core operators for the TileLang language, and will later support more comprehensive NPU operators.
On the same day, domestic chip makers such as Huawei Ascend and Cambricon announced they had achieved adaptation to DeepSeek-V3.2-Exp. For the unique TileLang programming language, Ascend has already implemented development of TileLang's Sparse Flash Attention and Lightning Indexer operators, and will later support more complete NPU operators and improve performance and generalizability.
From top AI models proposing requirements, to emerging programming languages providing tools, to domestic chips offering hardware support, this series of interactions is seen as a key step in building a "great closed loop" of domestic AI. The Minsheng Securities team stated:
DeepSeek v3.2 achieves the great "closed loop" of domestic AI.
From Model to Chip: The First Appearance of a Domestic AI Ecological Closed Loop
For the domestic computing industry, the value of TileLang goes far beyond improving development efficiency. It plays a key role as "middleware," connecting upper-level AI applications and underlying domestic hardware.
In DeepSeek's case, TileLang enables rapid iteration and verification of complex sparse attention algorithms. And when this efficient model is validated by the market, the programming tool it relies on naturally becomes the target for hardware manufacturers to be compatible with.
Minsheng Securities’ report notes that Huawei Ascend has already developed the "Sparse Flash Attention" and "Lightning Indexer" operators for TileLang. This means that domestic AI chips are actively embracing new software standards arising from local AI applications, gradually building an ecosystem that does not wholly rely on Nvidia CUDA.
CUDA is a set of programming tools provided by Nvidia to developers, allowing engineers to save considerable time writing low-level code by using high-level syntax such as C++ or Java for general GPU algorithms, thus solving complex problems in parallel computing.
TileLang: Making the Leap from “High Threshold” to “Popularized”
According to Dr. Wang Lei, initiator of the Tile-AI community, TileLang is a domain specific language (DSL) with Python-like syntax designed to simplify operator programming on accelerators like GPUs and NPUs. Its core design philosophy is to decouple complex hardware scheduling from the developer's algorithm logic.
According to Minsheng Securities, the core value of TileLang lies in greatly lowering the technical threshold of GPU programming.
Traditional GPU programming has long been seen as the "technical high ground" of high-performance computing, requiring developers to master complex knowledge such as hardware architecture and memory management. According to Dr. Wang Lei in a technical salon, under traditional development models, it can take several weeks to develop a high-performance operator, and the code is difficult to maintain.
TileLang, through layered design, allows developers with different technical backgrounds to participate in GPU programming. Dr. Wang Lei said in the presentation:
If you are a beginner with no hardware knowledge, you can write code just like writing advanced math expressions; if you are an expert, you can also do deep optimization.
This design concept opens GPU programming to a broader group of developers. Dr. Wang Lei emphasized at the salon that the goal of TileLang is to "bridge programmability and performance." In practice, this goal has already shown results—according to test data cited by Minsheng Securities, some operators developed with TileLang reduced code size to one-tenth of the traditional approach while maintaining 95% performance.
The Minsheng Securities team states that the main technical highlights of TileLang include:
1) Simplifying the complexity of NPU operator programming: TileLang adopts a Python-like syntax, greatly reducing the threshold for NPU operator development, and encapsulates the scheduling space as custom primitives, allowing developers to focus more on the data flow itself.
2) Supporting flexible expansion: Scheduling space and data flow are decoupled, NPU operator optimization is automatically completed by the compiler, and the underlying hardware features of NPUs are fully utilized.
3) High performance: TileLang can achieve high-performance NPU operators, allows users to sense NPU hardware features, and theoretically can attain better performance than Triton.
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